Bus interface and method for coupling a bus device to a bus

ABSTRACT

A bus interface is described, in particular in motor vehicles, for connecting a bus device to a bus using a pair of complementary bus lines, including a first driver circuit whose input is connected to the bus device and whose output is connected to the first bus line of the pair of complementary bus lines, and a second driver circuit, which is complementary to the first driver circuit and whose output is connected to the second bus line of the pair of complementary bus lines, the input of the second driver circuit being connected to the output of the first driver circuit.

FIELD OF THE INVENTION

The present invention relates to a bus interface as well as a method forconnecting a bus device to a bus.

BACKGROUND INFORMATION

Bus interfaces and/or connecting methods are available, e.g., for acontroller area network bus (CAN bus) in motor vehicles. Such a bus hasa pair of bus lines, wherein one bus line has a signal level with a timecharacteristic that is complementary to that of the other bus line. Thebus interfaces are used for coupling of bus devices in phase opposition,e.g., communication components, systems and/or subsystems, to the bus. Abus interface having a pair of driver circuits is known, wherein a firstdriver circuit with an output is connected to the first bus line and asecond driver circuit which is complementary in operation to the firstdriver circuit which has an output that is connected to the second busline. Each driver circuit has a switching element, one being implementedas a p-channel transistor and the other being implemented as ann-channel transistor.

In the case of such a bus interface, the inputs of both driver circuitsare connected to the bus device. Triggering of the two driver circuitsin phase opposition is accomplished with an inverting element at one ofthe two inputs. However, the triggering of the two driver circuits inphase opposition thus embodied results in phase displacement andasymmetry between the output signals of the two driver circuits becauseof differences in transit time, differences in the p- and n-channeltransistors used and/or component tolerances. Consequently, there is therisk that the output signals are not sufficiently accurately in phaseopposition, which results in increased high-frequency emission to theoutputs and the bus lines.

U.S. Pat. No. 6,111,431 relates to a driver circuit for transmitting adifferential signal to an external circuit. According to thisembodiment, the driver circuit has a plurality of transistors P21, P22and P33. In the event of an output-end short circuit to the drivercircuit, damage to transistors N21, N22 is prevented by a component R31.Transistors N11 and N12 are protected from a short circuit in the drivercircuit in a similar manner. Transistors P21 and P22 are controlled by afirst operational amplifier OPAMP1, while transistors N11 and N12 arecontrolled by a second operational amplifier OPAMP2. Transistors N22,N23 and transistors N21, N24 are alternately turned on and off by thearrangement of two inverters IV31, IV34 and NOR gates 31, 34 and NORgates 32, 33.

SUMMARY OF THE INVENTION

The bus interface according to an exemplary embodiment and/or method ofthe present invention may have the advantage over other designs whereinthe use of the output signal of the first driver circuit for triggeringthe second driver circuit results in a more pronounced phase oppositionof the two output signals. The voltage range of the output signals maybe kept constant. High-frequency emissions are thus reduced.

The exemplary embodiment and/or method of the present invention alsoprovides a voltage divider between the outputs of the driver circuitsfor triggering the second driver circuit and for tapping the centervoltage. The second driver circuit may be configured as a regulatingcircuit which regulates the center voltage of the voltage divider at apredetermined level, in particular at half the supply voltage. Thesecond driver circuit is advantageously formed by an operationalamplifier. The bus may be a CAN bus, as is conventional in motorvehicles today, in particular a serial bus. The present invention alsoincludes a method of connecting a bus device to a bus.

A differential amplifier having a differential output which is activatedonly by a received signal may also be used.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a view of a bus interface according to an exemplary embodimentand/or method of the present invention.

FIG. 2A is a time diagram of signal characteristics for a bus interfaceother than the exemplary embodiment and/or method of the presentinvention.

FIG. 2B is a time diagram of signal characteristics in the bus interfaceaccording to the exemplary embodiment and/or method of the presentinvention.

DETAILED DESCRIPTION

The bus interface according to FIG. 1 is intended to be switched betweena bus device at input In1 and a bus having lines H, L at outputs Out1,Out2.

The bus may be a serial controller area network bus such as that used inmotor vehicles. The bus has two complementary lines H, L, which hassignal levels that are to be in mutual phase opposition, i.e., when thesignal on one bus line is at a low level, the signal on the other busline is at a high level.

The phase opposition of the signals on the two bus lines H, L is ensuredby two driver circuits 1, 10, 11, 2, 20, 21. First driver circuit 1, 10,11 having switching element 1 and resistors 10, 11 is connected to theinput of the bus device. If switching element 1 is conducting, thenoutput line Out1 is at a high level. If switching element 1 is blocking,output signal Out1 is at a low level accordingly. The input of seconddriver circuit 2, 20, 21 is not connected to the bus device but insteadreceives in input In2 a signal coming from output Out1 of first drivercircuit 1, 10, 11. The signal is picked up in the middle of a voltagedivider which has resistors 3, 4 and is connected between two outputsOut1 and Out2.

The equilibrium level at the outputs is set via resistors 3, 4, 5, 6. Udenotes the power supply voltage.

Second driver circuit 2, 20, 21 has an operational amplifier 2 which iswired to function as a regulating circuit. The regulating circuit is setvia resistor 20 at the inverting input and voltage source 21 at thenon-inverting input so that center voltage UM is regulated by thevoltage divider, formed by two resistors 3, 4, at half of power supplyvoltage U/2. Thus, when output signal Out1 increases, center voltage UMalso increases. This center voltage UM is looped back to the invertinginput of operational amplifier 20. As a response to the increase in theinput voltage at the inverting input, operational amplifier 20 lowersthe voltage level at output Out2 accordingly, so that level UM is set athalf of power supply voltage U/2. If output signal Out1 drops, themechanism described here is reversed, and output signal Out2 becomes ahigher-level signal. This achieves a mutual phase opposition of the twooutput signals Out1 and Out2.

Driver circuit 2, 20, 21 is controlled as a function of the signal atoutput Out1 of first driver circuit 1, 10, 11. This minimizesasynchronicity of the output signals such as that caused by differencesin transit time and component tolerances in two driver circuits 1, 10,11 and/or 2, 20, 21. This results in a more pronounced phase oppositionand a lower high-frequency emission of both bus lines H, L.

In FIGS. 2A, B, time characteristics of the voltage in a bus interfacein other devices are compared with those of the bus interface accordingto the present invention.

FIG. 2A is a time diagram of signal characteristics in a bus interfacein other devices. The time offset between signals Out1, Out2 at therespective outputs of the bus interface is clearly visible; centervoltage UM has high peaks accordingly. Furthermore, the voltage range oftwo output voltages Out1 and Out2 is different.

FIG. 2B illustrates time characteristics of the signals described hereon the bus interface according to the exemplary embodiment of thepresent invention. Driver circuit 2, 20, 21, which is configured as aregulator, regulates center voltage UM at a constant U/2; there is notime offset between the two output voltages Out1 and Out2, and bothoutput voltages Out1 and Out2 have the same voltage range.

According to the method of coupling a bus device to a bus having a pairof complementary bus lines H, L, the bus device is connected to inputIn1 of a first driver circuit 1, 10, 11 and output Out1 of first drivercircuit 1, 10, 11 is connected to first bus line H of the pair ofcomplementary bus lines. Output Out2 of the second driver circuit whichis complementary to first driver circuit 1, 10, 11 is connected tosecond bus line L of the pair of complementary bus lines H, L, input In2of second driver circuit 2, 20, 21 being connected to output Out1 offirst driver circuit 1, 10, 11 such that input In2 of second drivercircuit 2, 20, 21 is connected to output Out1 of first driver circuit 1,10, 11 via center tapping point UM of a voltage divider 3, 4 which isconnected between the two outputs Out1, Out2 of the two driver circuits1, 10, 11; 2, 20, 21.

List of Reference Notations 1 Switching element 2 Operational amplifier3 Voltage divider resistor 4 Voltage divider resistor 5 Resistor 6Resistor 10 Resistor 11 Resistor 20 Resistor 21 Voltage source H, L Buslines In1 Input In2 Input Out1 Output Out2 Output UM Center voltage UPower supply voltage

1. A bus interface for connecting a bus device to a bus using a pair ofcomplementary bus lines, the bus interface comprising: a first drivercircuit that includes an input connected to the bus device, and anoutput connected to a first bus line of the pair of complementary buslines; and a second driver circuit that is complementary to the firstdriver circuit and that includes an output connected to a second busline of the pair of complementary bus lines, wherein an input of thesecond driver circuit is connected to the output of the first drivercircuit via a center tapping point of a voltage divider, which isconnected between the output of the first driver circuit and the outputof the second driver circuit, the second driver circuit including aregulator to regulate a potential at the center tapping point of thevoltage divider at a predetermined level, wherein the second drivercircuit is inverse-operated relative to the first driver circuit withrespect to a common voltage.
 2. The bus interface of claim 1, whereinthe second driver circuit includes an operational amplifier.
 3. The businterface of claim 1, wherein the first driver circuit receives signalsfrom an automotive communication component at the input of the firstdriver circuit.
 4. The bus interface of claim 1, wherein the busincludes a controller area network bus.
 5. A method for connecting a busdevice to a bus using a pair of complementary bus lines, the methodcomprising: connecting the bus device to an input of a first drivercircuit; connecting an output of the first driver circuit to a first busline of the pair of complementary bus lines; connecting an output of asecond driver circuit, which is complementary to the first drivercircuit, to a second bus line of the pair of complementary bus lines;connecting an input of the second driver circuit to the output of thefirst driver circuit via a center tapping point of a voltage divider,which is connected between the output of the first driver circuit andthe output of the second driver circuit, the second driver circuitincluding a regulator to regulate a potential at the center tappingpoint of the voltage divider at a predetermined level; and controllingthe first driver circuit by an input signal, wherein the second drivercircuit is inverse-operated relative to the first driver circuit withrespect to a common voltage.
 6. The method of claim 5, wherein thesecond driver circuit includes an operational amplifier.
 7. The methodof claim 5, wherein the first driver circuit receives signals from anautomotive communication component at the input of the first drivercircuit.
 8. The method according to claim 5, wherein the bus includes acontroller area network bus.
 9. The bus interface of claim 1, whereinthe bus interface is for a motor vehicle.